SiFive, Inc. has unveiled its Second Generation Intelligence family of RISC-V IP with the launch of five new RISC-V-based products, targeting a range of applications from the far edge IoT to the data center. All designed to accelerate AI workloads, the new family includes two new products—the X160 Gen 2 and X180 Gen 2 in the new X100 series—and three upgraded products—the X280 Gen 2, X390 Gen 2, and XM Gen 2. They all feature enhanced scalar, vector, and specifically with XM, matrix processing capabilities for modern AI workloads.
The new RISC-V-based products—built around a dual-issue, eight-stage, in-order superscalar pipeline—support multi-core/multi-cluster configurations and a wide variety of data types. This allows the processors to meet a range of requirements across many applications.
Offering high scalability and configurability, the Intelligence product family targets a variety of applications with giga operations per second (GOPS) to thousands of tera operations per second (TOPS), according to SiFive. The Second Generation Intelligence IP offers a range of performance, area, and power options within a single scalable ISA, offering narrow to wide vector engines and a scalable matrix engine with the XM Gen 2 product.
(Source: SiFive, Inc.)
The XM series Gen 2 delivers high performance per watt for compute-intensive applications across a wide range of workloads. It is heavily tuned for large language models and highly scalable to meet a wide range of end market applications, the company said.
The X160 Gen 2 (32-bit) and X180 Gen 2 (64-bit) target far edge compute and IoT applications, delivering high efficiency in a compact footprint and advanced AI functionality for the embedded edge, which is constrained by power and area. Target industries include automotive, autonomous robotics, industrial automation, and smart IoT.
The X390 superscalar processor with dual-vector-processing units scales up to a four-core cache-coherent complex with the optional SiFive Scalar Coprocessor Interface (SSCI) and Vector Coprocessor Interface eXtensions (VCIX) interfaces for close coupling with external AI accelerators or other coprocessors.
All X-Series IPs can function as an accelerator control unit (ACU), providing control and assist functions for a customer’s accelerator engine via the specialized co-processor interfaces (SSCI and VCIX), while simplifying the software stack.
In addition, the X390 Gen 2 introduces an efficient memory subsystem, configurable load queues to hide memory latency, and targeted instructions for speeding up AI/ML workloads, SiFive said. The X390 Gen 2 delivers 4× compute and 32× data throughput compared to the X280 Gen 1, and offers up to 1 TB/s data bandwidth in a four-core configuration. It can be used as a standalone edge AI processor or as an ACU, with a custom accelerator, to perform control and assist functions.
The X280 Gen 2 multi-core capable RISC-V processor with vector extensions and SiFive Intelligence Extensions is optimized for AI/ML compute at the edge. It adds several new features and enhancements, including RVA23 support, new instructions and extensions, improved memory subsystem, memory latency tolerance, and vector crypto support.
SiFive said the vector-based RISC-V IPs offer the right balance between efficiency, configurability, and performance. “Vector engines process multiple data items in parallel, reducing instruction overhead and power consumption,” the company said. “Compared to traditional scalar only CPUs, vector CPUs can run AI models faster, with a smaller footprint and lower power consumption—ideal for edge AI applications.”
All five Intelligence Gen 2 products are available for licensing immediately, with first silicon expected in the second quarter of 2026. SiFive will showcase these new products at the AI Infra Summit in Santa Clara, Calif., Sept. 9-11 in booth #908.
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