Industrial automation, telecommunications backbones, and smart infrastructure are all scaling rapidly, creating pressure on networks to move more data, over longer distances, with predictable performance. From synchronised robotic cells on the factory floor to time-critical telemetry across distributed campuses, next-generation deployments need higher bandwidth, tighter timing, and stronger, built-in security.

Smart factories, remote monitoring systems, and connected campuses exemplify these requirements: they demand multi-gigabit throughput for sensor fusion and video, deterministic behaviour for machine coordination, and end-to-end protection for sensitive operational data. Traditional copper links struggle with distance and noise; optical Ethernet offers a more reliable path for long-reach installations.

Addressing these needs, Microchip Technology has introduced a portfolio of Optical Ethernet PHY transceivers engineered for long-distance networks. The family supports speeds up to 25 Gbps, enabling higher aggregate bandwidth while maintaining data integrity across extended fibre runs.

Two cornerstone capabilities underpin this portfolio. First, IEEE 1588 Precision Time Protocol (PTP) enables precise time stamping for sub-microsecond synchronisation across distributed nodes, which is crucial for time-sensitive applications such as industrial control, robotics, and carrier transport. Second, MACsec (IEEE 802.1AE) provides link-layer encryption to protect data in motion against eavesdropping, spoofing, and other common attack vectors. Together, these features help engineers deploy networks that are fast, deterministic, and secure—ready for modern, long-reach Ethernet.

Engineering for Determinism and Precision: Sub-Nanosecond Synchronisation

At the heart of Microchip’s Optical Ethernet PHY transceiver portfolio is the integration of IEEE 1588 Precision Time Protocol (PTP)—a cornerstone technology that enables distributed devices to maintain a unified time reference with remarkable accuracy. Capable of achieving sub-nanosecond (<1 ns) synchronisation, PTP ensures that every node on the network operates in precise temporal alignment.

This level of accuracy is critical across sectors where timing precision directly affects system performance. In industrial automation, synchronised operations reduce cycle time and improve machine coordination. In robotics, precise timing enables real-time control across distributed actuators and sensors. And in telecommunications, PTP underpins deterministic data transport essential for 5G and next-generation backhaul networks.

Designed for long-range deployments, Microchip’s transceivers support single-mode fibre connections up to 10 kilometres, providing deterministic performance across extensive infrastructures such as warehouses, industrial sites, and multi-building campuses. By offering high accuracy over long distances, these devices eliminate latency variations that typically challenge large-scale Ethernet topologies.

As Charlie Forni, Corporate Vice President of Microchip’s Networking and Connectivity Solutions business, explains, “Design engineers are looking for solutions that simplify complex networking systems. Adding PTP or MACsec could mean a complete overhaul of an existing design—our solution helps preserve our customers’ core-processing investment.” By embedding both synchronisation and encryption capabilities directly at the PHY layer, Microchip has removed the need for major hardware redesigns, allowing engineers to enhance timing and security within existing architectures.

Through this integration, Microchip delivers not only precision but also design agility—empowering developers to deploy scalable, deterministic, and secure networks that meet the needs of modern industrial and telecommunications environments.

Built-In Security: Hardware-Level Protection with MACsec Encryption

As networks become increasingly interconnected, the attack surface expands—making embedded security a critical design priority. Microchip’s Optical Ethernet PHY transceivers integrate Media Access Control Security (MACsec, IEEE 802.1AE) directly at the silicon level, providing hardware-based encryption for traffic between Ethernet devices. This built-in capability ensures that data confidentiality and integrity are maintained from the physical layer upward, reducing exposure to common cyber threats.

Unlike software-implemented protection, hardware-level MACsec operates independently of host processors, enabling line-rate encryption without adding latency or consuming valuable CPU resources. The hardware engine authenticates and encrypts Ethernet frames in real time, creating a trusted communication channel that safeguards information even in untrusted or exposed environments.

The security layer thwarts several classes of attacks, including eavesdropping, spoofing, and denial-of-service (DoS). By verifying frame integrity and origin, MACsec prevents malicious actors from injecting or intercepting packets, ensuring that only authenticated traffic is processed. This protection is particularly vital across distributed industrial networks, where devices often operate in physically accessible or remote locations.

Embedding encryption within the transceiver represents a decisive shift toward secure-by-design networking—a concept gaining traction across the industrial IoT, automotive, and telecommunications sectors. As network infrastructure converges with operational technology, the boundary between IT and OT security is fading. Integrating MACsec at the hardware level helps engineers build resilience into their systems from the outset, rather than relying on layered or reactive software defences.

This hardware-first approach aligns with a broader industry movement: migrating critical functions such as encryption, authentication, and timing from the software domain to deterministic silicon. By hardening the foundation of the network, Microchip’s PHY transceivers enable the creation of trusted, high-performance communication frameworks that can securely support the next generation of connected industrial ecosystems.

Portfolio Overview and Development Ecosystem

Microchip’s Optical Ethernet PHY transceiver portfolio delivers high-speed, secure, and deterministic networking for industrial, data centre, and campus applications. Available in 10 Gbps and 25 Gbps configurations, the family features both dual-port and quad-port options, allowing designers to scale connectivity with precision and flexibility.

The following table outlines the new transceiver variants, highlighting their speed, port configuration, and supported features:

LAN826x Series — Supporting up to 10 Gbps

Dual-Port Variants

• LAN8262-V/3HW: 10 Gbps, Dual-port, MACsec
• LAN8263-V/3HW: 10 Gbps, Dual-port, PTP
• LAN8264-V/3HW: 10 Gbps, Dual-port, PTP, MACsec

Quad-Port Variants

• LAN8267-V/3HW: 10 Gbps, Quad-port, PTP
• LAN8268-V/3HW: 10 Gbps, Quad-port, PTP, MACsec

LAN802x and LAN804x Series — Supporting up to 25 Gbps

Dual-Port Variants

• LAN8022-V/3HW: 25 Gbps, Dual-port, MACsec
• LAN8023-V/3HW: 25 Gbps, Dual-port, PTP
• LAN8024-V/3HW: 25 Gbps, Dual-port, PTP, MACsec

Quad-Port Variants

• LAN8042-V/3HW: 25 Gbps, Quad-port, MACsec
• LAN8043-V/3HW: 25 Gbps, Quad-port, PTP
• LAN8044-V/3HW: 25 Gbps, Quad-port, PTP, MACsec

These devices provide deterministic, long-reach connectivity over single-mode fibre up to 10 kilometres, enabling reliable data transmission across large-scale environments such as industrial campuses, smart factories, and telecommunications backbones. Engineers can match the transceiver’s data rate and media type (Optical or DAC – Direct Attach Copper) to specific application requirements, ensuring optimal performance.

To assist with prototyping and system validation, Microchip offers the LAN8044 Evaluation Kit (EA00J09A), which includes the LAN8044 EDSX Daughter Card (EV57U68A) and the EVB-VSC7558TSN EDSX (UNG8415). These tools accelerate testing of PTP synchronisation, MACsec encryption, and interoperability with existing Ethernet infrastructures.

This new transceiver family complements Microchip’s extensive Ethernet portfolio, encompassing Single Pair Ethernet (SPE) solutions, multiport switches, and network controllers supporting speeds from 10 Mbps to 25 Gbps. Together, these offerings form a cohesive ecosystem engineered to meet the evolving connectivity, security, and scalability needs of industrial and embedded networks.

The Optical Ethernet PHY Transceivers are available now through Microchip’s authorised distributors and direct sales channels. This launch reinforces Microchip’s position as a trusted provider of comprehensive, high-performance Ethernet solutions for the connected industry.

Development Tools

To simplify evaluation and accelerate integration, Microchip provides a dedicated LAN8044 Evaluation Kit (part number EA00J09A). This kit includes the LAN8044 EDSX Daughter Card (part number EV57U68A) and the EVB-VSC7558TSN EDSX (UNG8415), allowing engineers to explore the full functionality of the Optical Ethernet PHY portfolio in a controlled, repeatable test environment.

The development tools support hands-on validation of IEEE 1588 Precision Time Protocol (PTP) performance, MACsec encryption features, and interoperability with various Ethernet system components. By providing out-of-the-box reference designs and test setups, Microchip enables developers to streamline system testing and reduce time-to-market for high-performance networking applications.

Pricing and Availability

The Optical Ethernet PHY Transceivers are now available for purchase in production quantities. Customers can order devices directly from Microchip Technology or through an authorised Microchip sales representative or distributor worldwide.

With the addition of these devices, Microchip continues to strengthen its Ethernet ecosystem, delivering reliable, secure, and scalable connectivity for industrial automation, telecommunications, and embedded networking systems.